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Message-Id: <200705191347.44866.ak@suse.de>
Date:	Sat, 19 May 2007 13:47:44 +0200
From:	Andi Kleen <ak@...e.de>
To:	Dave Jones <davej@...hat.com>
Cc:	Christian <haveaniceday@...sv.de>, linux-kernel@...r.kernel.org
Subject: Re: 2.6.22-rc1 does not boot on VIA C3_2 cause of X86_CMPXCHG64 II

On Saturday 19 May 2007 08:02, Dave Jones wrote:
> On Sat, May 19, 2007 at 07:53:16AM +0200, Andi Kleen wrote:
>  > This preserves the 6 <= model  <= 9 logic of the C code; this means
>  > if VIA ever brings out model >= 10 it hopefully sets this bit by
>  > default. Dave, do you have any information to the contrary?
>
> Model 10 (Esther) has the same feature.

Hmm nasty. Is it safe to assume that all VIA family == 6 will have that
MSR with the bit doing the same?

Perhaps we need some Centaur contact for guidance on this. Do you
have a current one? 

-Andi (who failed even to find current datasheets on the VIA website) 

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