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Message-ID: <653FFBB4508B9042B5D43DC9E18836F5EA4C09@scsmsx415.amr.corp.intel.com>
Date:	Mon, 21 May 2007 08:52:34 -0700
From:	"Pallipadi, Venkatesh" <venkatesh.pallipadi@...el.com>
To:	"Jesse Barnes" <jbarnes@...tuousgeek.org>,
	"Udo A. Steinberg" <us15@...inf.tu-dresden.de>
Cc:	"linux-kernel" <linux-kernel@...r.kernel.org>,
	"Andrew Morton" <akpm@...l.org>,
	"Thomas Gleixner" <tglx@...utronix.de>, "Andi Kleen" <ak@...e.de>,
	"Ingo Molnar" <mingo@...e.hu>, "Chris Wright" <chrisw@...s-sol.org>
Subject: RE: [PATCH 4/8] Force detect and enable HPET on ICH



>-----Original Message-----
>From: Jesse Barnes [mailto:jbarnes@...tuousgeek.org] 
>Sent: Monday, May 21, 2007 8:46 AM
>To: Udo A. Steinberg
>Cc: Pallipadi, Venkatesh; linux-kernel; Andrew Morton; Thomas 
>Gleixner; Andi Kleen; Ingo Molnar; Chris Wright
>Subject: Re: [PATCH 4/8] Force detect and enable HPET on ICH
>
>On Sunday, May 20, 2007, Udo A. Steinberg wrote:
>> On Mon, 7 May 2007 13:31:28 -0700 Venki Pallipadi (VP) wrote:
>>
>> VP> Force detect and/or enable HPET on ICH chipsets. This patch just
>> handles the VP> detection part and following patches use this
>> information.
>> VP>
>> VP> Signed-off-by: Venkatesh Pallipadi 
><venkatesh.pallipadi@...el.com>
>>
>> Venki,
>>
>> Is there any reason your patch only enables HPET on ICH6 and beyond?
>> HPET can be enabled on earlier ICH by setting bit 17 in 
>GEN_CNTL on PCI
>> dev 31, func 0, offset d0. This seems to work for ICH3/4/5. Are there
>> any errata affecting these ICHs?
>
>I see it documented in the ICH5 datasheet, but that bit is 
>marked reserved 
>in the ICH3 and ICH4 datasheets...  Which docs are you looking at?
>
>Jesse

The same bits are supported on ICH5 and ICH4M. I am about to
send a patch to add PCIIDs of ICH5 and ICH4M to force_detect. 

These bits were reserved on ICH4 though.

Thanks,
Venki
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