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Message-Id: <20070526.170039.119261389.davem@davemloft.net> Date: Sat, 26 May 2007 17:00:39 -0700 (PDT) From: David Miller <davem@...emloft.net> To: grundler@...isc-linux.org Cc: abraham.manu@...il.com, rdreier@...co.com, greg@...ah.com, linux-pci@...ey.karlin.mff.cuni.cz, linux-kernel@...r.kernel.org Subject: Re: PCIE From: Grant Grundler <grundler@...isc-linux.org> Date: Sat, 26 May 2007 17:55:15 -0600 > MSI (and MSI-X) vectors are required to be exclusive. > I submitted that change to pci.txt last year: > http://lkml.org/lkml/2006/12/25/2 > > and ISTR I've posted that bit of the PCI spec a few years ago. > But it probably was to linux-pci mailing list only. This requirement only extends to the PCI host controller, how that interfaces to the cpu and it's limitations is an entirely other matter. > > I can imagine many systems where the cpu simply doesn't have enough > > interrupt pins to uniquely identify every possible MSI interrupt > > source. > > The cpus haven't been using interrupt pins for a long time now. > Anything with a Local-xAPIC is already using transactions to > signal interrupts even if the OS isn't aware of it. I'm not talking about x86, x86_64, et al. I'm talking about embedded ARM chips and the like, and yes they very possibly will be using PCI-E controllers at some point. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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