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Message-ID: <adaps4l21fe.fsf@cisco.com>
Date: Sun, 27 May 2007 18:15:49 -0700
From: Roland Dreier <rdreier@...co.com>
To: Manu Abraham <abraham.manu@...il.com>
Cc: Grant Grundler <grundler@...isc-linux.org>,
Greg KH <greg@...ah.com>, linux-pci@...ey.karlin.mff.cuni.cz,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: PCIE
> >> Another question would be if the device supports multiple messages, MSIX
> >> should be used ?
> >
> > Yes. Assuming the device supports multiple MSI-X messages.
At least on my device (PCI ID 1131:7162) there is no MSI-X capability,
so that's not an option for you. The current Linux implementation
does not support more than one MSI interrupt, so you just get one
interrupt with pci_enable_msi().
I think it's probably simplest for you to forget about MSI until you
have the basic driver working.
> Ok. Alongwith this, i am a bit confused with the mailbox approach of
> sending messages, every register type has it's own set of interrupt
> registers (for example I2C, say I2C has it's own set of 32 STATUS
> bitfields for it's interrupt, the same goes for the others)
>
> Another aspect is the DTL-MMIO interface, which isn't defined any place.
> Using the base addresses as an offset to the normal MMIO obtained using
> pci_resource_*/ioremap() doesn't seem to work at all.
> [etc....]
All this is device-specific stuff ... not sure how much anyone can
help you if you can't share the docs.
- R.
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