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Message-ID: <20070626150249.GA7877@one.firstfloor.org>
Date: Tue, 26 Jun 2007 17:02:49 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Jesse Barnes <jesse.barnes@...el.com>
Cc: Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org,
akpm@...ux-foundation.org, Justin Piszcz <jpiszcz@...idpixels.com>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Yinghai Lu <yhlu.kernel@...il.com>
Subject: Re: [PATCH] trim memory not covered by WB MTRRs
On Mon, Jun 25, 2007 at 04:36:52PM -0700, Jesse Barnes wrote:
> On Monday, June 25, 2007 4:34:33 Andi Kleen wrote:
> > > This patch fixes a bug in the last patch that caused the code to
> > > run on non-Intel machines (AMD machines apparently don't need it
> >
> > Actually the problem can happen on AMD too, but the symptoms can
> > be different and there can be more wrong than just the MTRRs.
>
> I should have been more specific in the changelog. My understanding is
> that AMD systems don't need it for memory above 4G, and since the code
AMD systems need MTRRs to get cached memory too, or what is your point?
There was a new memory remapping feature in RevE but I didn't think
it obsoleted MTRRs.
We've also had systems with this issue.
-Andi
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