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Message-ID: <20070626173157.GD5244@one.firstfloor.org>
Date: Tue, 26 Jun 2007 19:31:57 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Arjan van de Ven <arjan@...ux.intel.com>
Cc: Andi Kleen <andi@...stfloor.org>,
Muli Ben-Yehuda <muli@...ibm.com>,
Andrew Morton <akpm@...ux-foundation.org>,
"Keshavamurthy, Anil S" <anil.s.keshavamurthy@...el.com>,
linux-kernel@...r.kernel.org, gregkh@...e.de,
suresh.b.siddha@...el.com, ashok.raj@...el.com,
davem@...emloft.net, clameter@....com
Subject: Re: [Intel IOMMU 00/10] Intel IOMMU support, take #2
> >>(and I think it mostly already doesn't even without that)
> >
> >It uses /sys/bus/pci/* which is not any better as seen from the IOMMU.
> >
> >Any interface will need to be explicit because user space needs to know
> >which
> >DMA addresses to put into the hardware. It's not enough to just
> >transparently
> >translate the mappings.
>
> that's what DRM is used for nowadays...
But DRM does support much less hardware than the X server?
Perhaps we just need an ioctl where an X server can switch this.
-Andi
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