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Message-ID: <46A003C0.5040909@vmware.com>
Date:	Thu, 19 Jul 2007 17:37:20 -0700
From:	Zachary Amsden <zach@...are.com>
To:	Andi Kleen <ak@...e.de>
CC:	mathieu.desnoyers@...ymtl.ca, jbeulich@...ell.com,
	"S. P. Prasanna" <prasanna@...ibm.com>,
	linux-kernel@...r.kernel.org, patches@...-64.org
Subject: Re: new text patching for review

Andi Kleen wrote:
> +	*addr = opcode;
> +	/* Not strictly needed, but can speed CPU recovery up */
> +	if (cpu_has_clflush)
> +		asm("clflush (%0) " :: "r" (addr) : "memory");
> +	if (addr != oaddr)
> +		vunmap(addr);
>   

clflush should take oaddr.

If you had to remap, note that the processor does not know the linear 
address you wrote to could be matched by another mapping in icache.  In 
that case, you'll need a serializing instruction (cpuid) to 
resynchronize caches.

I don't think any of these are SMP problems since either the code is 
patched before AP bringup or it is single byte patching.

Zach
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