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Message-Id: <20070731140213.5469a775.kamezawa.hiroyu@jp.fujitsu.com>
Date:	Tue, 31 Jul 2007 14:02:13 +0900
From:	KAMEZAWA Hiroyuki <kamezawa.hiroyu@...fujitsu.com>
To:	KAMEZAWA Hiroyuki <kamezawa.hiroyu@...fujitsu.com>
Cc:	"David Mosberger-Tang" <dmosberger@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	"linux-ia64@...r.kernel.org" <linux-ia64@...r.kernel.org>,
	"tony.luck@...el.com" <tony.luck@...el.com>,
	"Zoltan.Menyhart@...l.net" <Zoltan.Menyhart@...l.net>,
	"Christoph Lameter" <clameter@....com>
Subject: Re: [PATCH] flush icache before set_pte take6. [4/4] optimization
 for cpus other than montecito

On Tue, 31 Jul 2007 13:29:32 +0900
KAMEZAWA Hiroyuki <kamezawa.hiroyu@...fujitsu.com> wrote:

> On Mon, 30 Jul 2007 22:15:50 -0600
> "David Mosberger-Tang" <dmosberger@...il.com> wrote:
> 
> > This seems crazy to me.  Flushing should occur according to the
> > *architecture*, not model-by-model.  Even if we happen to get "lucky"
> > on pre-Montecito CPUs, that doesn't justify such ugly hacks.  
> 

BTW, how about the quality of patch[2/4] ?

If it is enough well, I want it to be merged....

please..
-Kame

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