linux-kernel - RE: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito

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Message-ID: <617E1C2C70743745A92448908E030B2A020E3B1C@scsmsx411.amr.corp.intel.com>
Date:	Tue, 31 Jul 2007 09:44:35 -0700
From:	"Luck, Tony" <tony.luck@...el.com>
To:	"David Mosberger-Tang" <dmosberger@...il.com>,
	"KAMEZAWA Hiroyuki" <kamezawa.hiroyu@...fujitsu.com>
Cc:	"LKML" <linux-kernel@...r.kernel.org>,
	<linux-ia64@...r.kernel.org>, <Zoltan.Menyhart@...l.net>,
	"Christoph Lameter" <clameter@....com>
Subject: RE: [PATCH] flush icache before set_pte take6. [4/4] optimization for cpus other than montecito

> This seems crazy to me.  Flushing should occur according to the
> *architecture*, not model-by-model.  Even if we happen to get "lucky"
> on pre-Montecito CPUs, that doesn't justify such ugly hacks.  Or you
> really want to debug this *again* come next CPU?

Ditto.  The only reason we should ever have model specific checks should
be to work around model specific errata (e.g. the McKinley Errata #9 code
in patch.c).

-Tony
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