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Message-ID: <46B92B10.7@3gfp.com>
Date: Tue, 07 Aug 2007 22:31:44 -0400
From: Harvey Chapman <hchapman-linux-kernel@...p.com>
To: linux-kernel@...r.kernel.org
Subject: Re: [PATCH] serial inter-character timeout usage with async io
Harvey Chapman wrote:
> just don't identify it specifically. In the ISRs, they simply check to
> see if any of bits 1, 2, or 3 are set. In the example above, on the last
Well, not entirely true, it actually checks bit 0 which indicates that
there was an interrupt, period. Bits 1, 2, and 3 indicate why the
interrupt occurred, but 8250.c and pxa.c ignore those bits.
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