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Date:	Mon, 13 Aug 2007 14:07:37 -0500
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	Jarek Poplawski <jarkao2@...pl>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	LKML <linux-kernel@...r.kernel.org>, Ingo Molnar <mingo@...e.hu>,
	Stable Team <stable@...nel.org>,
	Jean-Baptiste Vignaud <vignaud@...dmail.fr>,
	"marcin.slusarz" <marcin.slusarz@...il.com>
Subject: Re: [patch 3/3] genirq: mark io_apic level interrupts to avoid
	resend

On Mon, 2007-08-13 at 15:53 +0200, Jarek Poplawski wrote:
> 
> I've thought e.g. about "fasteoi" for this "Virtual Wire" timer for
> i386: I hope it's OK, but since is it any problem to add some comment
> here, why it's OK with resending here (with POWERPC it's easier to
> think it's something special, but here we have to similar things in
> the same file)?

To be totally fair, there shouldn't be a problem with spurrious
re-sends, I'm not sure what problems some chipsets are having there,
though it may be related to the method used for re-sending. On ppc, we
use the soft method I think everywhere anyway.

I use re-sending on cell with fasteoi for the on-die top-level PIC
because while it does have a HW priority handling, it also doesn't have
a HW mask. Thus I just "drop" IRQs that are masked and resend (it's edge
messages).

Ben.


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