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Message-ID: <46C2391D.1060608@chelsio.com>
Date:	Tue, 14 Aug 2007 16:22:05 -0700
From:	Divy Le Ray <divy@...lsio.com>
To:	Jeff Garzik <jeff@...zik.org>
CC:	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	Steve Wise <swise@...ngridcomputing.com>
Subject: Re: [PATCH 2/13] cxgb3 - Update rx coalescing length

Jeff Garzik wrote:
>
> Divy Le Ray wrote:
> > From: Divy Le Ray <divy@...lsio.com>
> >
> > Set max Rx coalescing length to 12288
> >
> > Signed-off-by: Divy Le Ray <divy@...lsio.com>
> > ---
> >
> >  drivers/net/cxgb3/common.h |    2 +-
> >  1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h
> > index c46c249..55922ed 100644
> > --- a/drivers/net/cxgb3/common.h
> > +++ b/drivers/net/cxgb3/common.h
> > @@ -104,7 +104,7 @@ enum {
> >       PROTO_SRAM_LINES = 128, /* size of TP sram */
> >  };
> > 
> > -#define MAX_RX_COALESCING_LEN 16224U
> > +#define MAX_RX_COALESCING_LEN 12288U
>
> neither the patch nor description explains -why-
>

We're seeing back pressure from PCIe with large bursts, this patch 
allows to cut down on the burst size.

Divy

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