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Message-ID: <20070823055856.GN89849@sgi.com>
Date: Wed, 22 Aug 2007 22:58:56 -0700
From: Jeremy Higdon <jeremy@....com>
To: Jes Sorensen <jes@....com>
Cc: James Bottomley <James.Bottomley@...senPartnership.com>,
akepner@....com, Randy Dunlap <randy.dunlap@...cle.com>,
linux-kernel <linux-kernel@...r.kernel.org>, rdreier@...co.com,
linux-ia64 <linux-ia64@...r.kernel.org>
Subject: Re: [PATCH 2/3] dma: override "dma_flags_set_dmaflush" for sn-ia64
On Wed, Aug 22, 2007 at 09:39:36AM +0200, Jes Sorensen wrote:
> James Bottomley wrote:
> >On Tue, 2007-08-21 at 17:34 -0700, akepner@....com wrote:
> >>The term "posted DMA" is used to describe this behavior in the Altix
> >>Device Driver Writer's Guide, but it may be confusing things here.
> >>Maybe a better term will suggest itself if I can clarify....
> >
> >OK, but posted DMA has a pretty specific meaning in terms of PCI, hence
> >the confusion.
>
> Maybe it would be more better to refer to this as 'out of order DMA'?
>
> >>On Altix, DMA from a device isn't guaranteed to arrive in host memory
> >>in the order it was sent from the device. This reordering can happen
> >>in the NUMA interconnect (it's specifically not a PCI reordering.)
> >
> >This is mmiowb and read_relaxed() again, isn't it?
>
> I believe it's the same problem, except this time it's when exposing
> structures to userland.
Actually, it's a different problem, but with a similar cause.
mmiowb() is for the case PIO (or MMIO) write order from two different CPUs
can invert somewhere in the NL fabric.
read_relaxed() is a performance optimization to avoid the flush that's
necessary to avoid inversion in order between a PIO (or MMIO) read and
a DMA write.
What Arthur's trying to do here is avoid inversion in the order of two
DMA writes.
jeremy
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