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Message-ID: <20070903154734.GC22086@alberich.amd.com>
Date: Mon, 3 Sep 2007 17:47:34 +0200
From: "Andreas Herrmann" <andreas.herrmann3@....com>
To: "Arjan van de Ven" <arjan@...radead.org>
cc: "Robert Richter" <robert.richter@....com>, patches@...-64.org,
linux-kernel@...r.kernel.org
Subject: Re: [patches] [patch 3/5] x86: Add PCI extended config space
access for AMD Barcelona
On Mon, Sep 03, 2007 at 04:33:19AM -0700, Arjan van de Ven wrote:
> On Mon, 3 Sep 2007 11:17:18 +0200
> "Andreas Herrmann" <andreas.herrmann3@....com> wrote:
> \>
> > Do you see any other issues besides the naming of the bit?
>
> I wonder if we should key this off a PCI ID of the chipset rather than
> the cpu id... I mean, how sure are you that all via chipsets connected
> to the barcelona cpu will deal well?
In general they should be able to deal with those accesses. They result in
extended type 0/1 configuration cycles which are defined already in HT I/O Link
Spec 1.10. So if unexpectedly problems arise then it is time to add a pci-quirk.
But at the moment there is no need for further discussion on this subject
because Andi refuses to add support for Barcelona CF8/CFC ECS access.
Regards,
Andreas
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