linux-kernel - Re: [PATCH]PCI:disable resource decode in PCI BAR detection

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Message-id: <46EC3F8D.4040702@shaw.ca>
Date:	Sat, 15 Sep 2007 14:24:45 -0600
From:	Robert Hancock <hancockr@...w.ca>
To:	Yinghai Lu <yhlu.kernel@...il.com>
Cc:	Robert Hancock <hancockr@...w.ca>,
	Ivan Kokshaysky <ink@...assic.park.msu.ru>,
	Greg KH <gregkh@...e.de>, Matthew Wilcox <matthew@....cx>,
	Shaohua Li <shaohua.li@...el.com>,
	lkml <linux-kernel@...r.kernel.org>,
	linux-pci <linux-pci@...ey.karlin.mff.cuni.cz>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Jesse Barnes <jbarnes@...tuousgeek.org>
Subject: Re: [PATCH]PCI:disable resource decode in PCI BAR detection

Yinghai Lu wrote:
> On 9/14/07, Robert Hancock <hancockr@...w.ca> wrote:
>> It's not impossible at all. In fact I'm quite sure (Jesse can confirm)
>> that in the case of the board he was using, it was an add-in graphics
>> card where he saw this problem.
>>
>> The fact is that in the case of MMCONFIG overlap with PCI BARs, which
>> one takes priority is completely undefined. In the case of this Intel
>> chipset, clearly the PCI Express device connected to the northbridge had
>> higher decode priority than the MMCONFIG aperture.
> 
> can you relocate the MMCONFIG above RAM range? for example 512G...

On some chipsets that might be possible, however I think that on the 
Intel ones it's not possible to move it above 4G. And in any case this 
would require chipset-specific knowledge, which we would rather not have 
to need.

-- 
Robert Hancock      Saskatoon, SK, Canada
To email, remove "nospam" from hancockr@...pamshaw.ca
Home Page: http://www.roberthancock.com/

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