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Message-ID: <20071001222449.GA11367@linux.vnet.ibm.com>
Date:	Mon, 1 Oct 2007 15:24:49 -0700
From:	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To:	Davide Libenzi <davidel@...ilserver.org>
Cc:	Oleg Nesterov <oleg@...sign.ru>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	linux-rt-users@...r.kernel.org, Ingo Molnar <mingo@...e.hu>,
	Andrew Morton <akpm@...ux-foundation.org>, dipankar@...ibm.com,
	josht@...ux.vnet.ibm.com, tytso@...ibm.com, dvhltc@...ibm.com,
	tglx@...utronix.de, a.p.zijlstra@...llo.nl, bunk@...nel.org,
	ego@...ibm.com, srostedt@...hat.com
Subject: Re: [PATCH RFC 3/9] RCU: Preemptible RCU

On Mon, Oct 01, 2007 at 03:09:16PM -0700, Davide Libenzi wrote:
> On Mon, 1 Oct 2007, Paul E. McKenney wrote:
> 
> > That would indeed be one approach that CPU designers could take to
> > avoid being careless or sadistic.  ;-)
> 
> That'd be the easier (unique maybe) approach too for them, from an silicon 
> complexity POV. Distinguishing between different CPUs stores once inside a 
> shared store buffer, would require tagging them in some way. That'd defeat 
> most of the pros of having a shared store buffer ;)

Tagging requires but one bit per entry.  Depends on the workload -- if
lots of barriers, bursty stores and little sharing, tagging might win.
If lots of sharing, then your suggested approach might win.

						Thanx, Paul
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