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Date:	Mon, 22 Oct 2007 16:58:22 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	khc@...waw.pl
Cc:	jeff@...zik.org, barkalow@...ervon.org, linas@...tin.ibm.com,
	chunhao.huang@...mail.com, gregkh@...e.de, htejun@...il.com,
	brice.goglin@...il.com, david.gaarenstroom@...il.com,
	linux-kernel@...r.kernel.org, linux-pci@...ey.karlin.mff.cuni.cz,
	shane.huang@....com, linux-ide@...r.kernel.org, brice@...i.com
Subject: Re: [patch] PCI: disable MSI on more ATI NorthBridges

From: Krzysztof Halasa <khc@...waw.pl>
Date: Tue, 23 Oct 2007 01:40:18 +0200

> Jeff Garzik <jeff@...zik.org> writes:
> 
> > In general it is documented that INTX_DISABLE should apply only to
> > INTx# so devices that disable MSI based on that bit are out of spec.
> 
> The wording is:
> 10: This bit disables the device from asserting INTx#. A value of 0
> enables the assertion of its INTx# signal. A value of 1 disables the
> assertion of its INTx# signal. This bit's state after RST# is 0. Refer
> to Section 6.8.1.3 for control of MSI.
> 
> So strictly speaking it mandates disabling/enabling INTx but says
> nothing about other things (e.g. MSI). Some common sense dictates
> it shouldn't disable MSI, I guess.

Right, and every vendor I've spoken to who had the INTX_DISABLE
bug clearly acknowledged that it was a bug in their RTL design
and that they considered the spec to be clear on this matter
in that INTX_DISABLE should not influence MSI in any way.

> The "MSI Enable" description doesn't leave any doubt:
> 0: MSI Enable: If 1, the function is permitted to use MSI to request
> service and is prohibited from using its INTx# pin [...]

Things get more complicated with PCI-Express because INTx# isn't an
out-of-band "pin", but rather a message sent over the bus :-)
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