| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <yw1xwstbjanz.fsf@thrashbarg.mansr.com> Date: Thu, 25 Oct 2007 19:45:20 +0100 From: Måns Rullgård <mans@...sr.com> To: linux-kernel@...r.kernel.org Subject: Re: Is gcc thread-unsafe? Arjan van de Ven <arjan@...radead.org> writes: > On Wed, 24 Oct 2007 21:29:56 -0700 > "David Schwartz" <davids@...master.com> wrote: > >> >> > Well that's exactly right. For threaded programs (and maybe even >> > real-world non-threaded ones in general), you don't want to be >> > even _reading_ global variables if you don't need to. Cache misses >> > and cacheline bouncing could easily cause performance to completely >> > tank in some cases while only gaining a cycle or two in >> > microbenchmarks for doing these funny x86 predication things. >> >> For some CPUs, replacing an conditional branch with a conditional >> move is a *huge* win because it cannot be mispredicted. > > please name one... > Hint: It's not one made by either Intel or AMD in the last 4 years... ARM. On ARM1136 (used in the Nokia N800) a mispredicted branch takes 5-7 cycles (a correctly predicted branch takes 0-4 cycles), while a conditional load, store or arithmetic instruction always takes one cycle. -- Måns Rullgård mans@...sr.com - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists