linux-kernel - Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch

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Message-Id: <200710301950.58519.ak@suse.de>
Date:	Tue, 30 Oct 2007 19:50:58 +0100
From:	Andi Kleen <ak@...e.de>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
Cc:	Robert Hancock <hancockr@...w.ca>, Greg KH <greg@...ah.com>,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	akpm@...ux-foundation.org, rajesh.shah@...el.com,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: pci-disable-decode-of-io-memory-during-bar-sizing.patch

> At that point, almost all the issues with mmconfig just go away, BECAUSE 
> NOBODY USES IT, so it doesn't matter if it's broken?

We seem to slowly grow more uses of registers > 256, but yes it's still mostly 
non critical stuff.

> The fact is, CONF1 style accesses are just safer, and *work*. 
> 
> Can we please just do that? 

At least for the AMD GART IOMMU I would prefer if that was not done.
It has a pci config space access in a time critical path (flush).
And Family10h supports accessing the northbridge using mmconfig.

I believe the tigon3 driver also does config space access frequently
on some chips.

Also there are still the old x86 Macs where conf1 doesn't work.

-Andi
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