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Message-ID: <47303F77.9080502@gmail.com>
Date:	Tue, 06 Nov 2007 19:18:31 +0900
From:	Tejun Heo <htejun@...il.com>
To:	Alan Cox <alan@...rguk.ukuu.org.uk>
CC:	albertl@...l.com, albertcc@...ibm.com,
	Daniel Drake <dsd@...too.org>, Jeff Garzik <jeff@...zik.org>,
	Jens Axboe <jens.axboe@...cle.com>,
	linux list <linux-kernel@...r.kernel.org>,
	linux-ide@...r.kernel.org
Subject: Re: "Fix ATAPI transfer lengths" causes CD writing regression

Alan Cox wrote:
> On Mon, 05 Nov 2007 09:05:48 +0900
> Tejun Heo <htejun@...il.com> wrote:
> 
>> Alan Cox wrote:
>>>> Maybe we could set a limit here. If the ATAPI device keeps DRQ=1 and
>>>> exceeds the limit, we consider it as HSM violation and have EH handle it.
>>> On a DMA transfer its basically out of our control (and a PIO drain will
>>> lock some controllers solid until power cycle),
>> Do such controllers lock up on PIO draining after PIO transfers too?
>> Can you tell which are those controllers?
> 
> Promise PDC202xx will lock on a PIO drain of a DMA transfer or (if you
> reset it before you drain) on a PIO drain of a PIO transfer.

Just to make sure I'm not misunderstanding it.  So, PDC202xx will lock
up if you transfer allocation size, reset and then try to drain, but
it's okay to keep draining as part of continued PIO transfer, right?

-- 
tejun
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