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Message-ID: <20071113214628.GE5747@frankl.hpl.hp.com>
Date: Tue, 13 Nov 2007 13:46:28 -0800
From: Stephane Eranian <eranian@....hp.com>
To: Andi Kleen <andi@...stfloor.org>
Cc: akpm@...l.org, Robert Richter <robert.richter@....com>,
gregkh@...e.de, linux-kernel@...r.kernel.org,
perfmon@...ali.hpl.hp.com, William Cohen <wcohen@...hat.com>,
perfmon2-devel@...ts.sourceforge.net
Subject: Re: [perfmon] Re: [perfmon2] perfmon2 merge news
Andi.
On Tue, Nov 13, 2007 at 10:29:02PM +0100, Andi Kleen wrote:
> On Tue, Nov 13, 2007 at 01:13:45PM -0800, Stephane Eranian wrote:
> > Oprofile does not setup the PMU interrupt. It builds on top of the NMI watchdog
> > setup.
>
> Oprofile works without the NMI watchdog too, but it just happens to be another
> NMI user.
>
I have no doubt it can work with a "regular" interrupt.
> > It uses the register_die() mechanism,
>
> Not correct.
>
I meant the register_die_notifier() mechanism which allow you to
chain a handler on NMI interrupts. At least that's my understanding
reading the code:
static int nmi_setup(void)
{
int err=0;
int cpu;
if (!allocate_msrs())
return -ENOMEM;
if ((err = register_die_notifier(&profile_exceptions_nb))){
free_msrs();
pfm_release_allcpus();
return err;
}
...
> > if I recall. The low level APIC
> > and gate is setup elsewhere. Perfmon does not use NMI, unless forced to because
> > of the NMI watchdog.
>
> It could handle it in the same way as oprofile if it wanted. But given
> NMIs make everything more complicated and it might not be worth it.
>
Yes, horribly more complicated because of locking issues within perfmon.
As soon as you expose a file descriptor, you need some locking to prevent
multiple user threads (malicious or not) to compete to access the PMU state.
I think the value add of NMI can be as well achieved with advanced PMU features
such as Intel Core 2 PEBS.
--
-Stephane
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