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Message-ID: <473B17D4.5050702@redhat.com>
Date: Wed, 14 Nov 2007 10:44:20 -0500
From: William Cohen <wcohen@...hat.com>
To: Andi Kleen <andi@...stfloor.org>
CC: Stephane Eranian <eranian@....hp.com>, akpm@...l.org,
Robert Richter <robert.richter@....com>, gregkh@...e.de,
linux-kernel@...r.kernel.org
Subject: Re: [perfmon] Re: [perfmon2] perfmon2 merge news
Andi Kleen wrote:
>> One approach does not prevent the other. Assuming you allow cr4.pce, then nothing prevents
>> a self-monitoring thread from reading the counters directly. You'll just get the
>> lower 32-bit of it. So if you read frequently enough, you should not have a problem.
>
> Hmm? RDPMC is 64bit.
There are a number of processors that have 32-bit counters such as the IBM power
processors. On many x86 processors the upper bits of the counter are sign
extended from the lower 32 bits. Thus, one can only assume the lower 32-bit are
available. Roll over of values is quite possible (<2 seconds of cycle count), so
additional work needs to be done to obtain a valid value.
>> But keep in mind that we do want a uniform interface across all hardware and all type
>> of sessions (self-monitoring, CPU-wide, monitoring of another thread). You don't want
>> an interface that says on x86 you have to use rdpmc, on Itanium pfm_read_pmds() and so
>
> I disagree. Using RDPMC is essential for at least some of the things I would like
> to do with perfmon2. If the interface does not provide it it is useless to me at least.
> System calls are far too slow for cycle measurements.
What range of cycles are you interested in measuring? 100's of cycles? A couple
thousand? Are you just looking at cycle counts or other events?
-Will
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