linux-kernel - Re: Why preallocate pmd in x86 32-bit PAE?

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Message-ID: <473DCF73.4070401@goop.org>
Date:	Fri, 16 Nov 2007 09:12:19 -0800
From:	Jeremy Fitzhardinge <jeremy@...p.org>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
CC:	William Lee Irwin III <wli@...omorphy.com>,
	Andi Kleen <ak@...e.de>, Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>,
	Nick Piggin <nickpiggin@...oo.com.au>,
	"H. Peter Anvin" <hpa@...or.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: Why preallocate pmd in x86 32-bit PAE?

Linus Torvalds wrote:
> On Thu, 15 Nov 2007, Jeremy Fitzhardinge wrote:
>   
>> Once difference is that 64-bit incrementally allocates all levels of the
>> pagetable, whereas 32-bit PAE preallocates the 4 pmds when it allocates
>> the pgd.  What's the rationale for this?  What pitfalls would there be
>> in making them incrementally allocated?
>>     
>
> IIRC, the present bit is ignored in the magic 4-entry PGD.  All entries 
> have to be present.
>   

Hm, do you recall what processors that might affect?  As far as I know,
current processors will ignore non-present top-level entries.  Anyway,
we can point them not present to empty_zero_page, so testing the present
bit will still be sufficient to tell if we need to allocate a new pmd,
but if the hardware decides to follow the page reference there's no harm
done.  (Hm, unless the hardware decides it wants to set A or D bits in
empty_zero_page for some reason...)

> What earlier CPU's did was to basically load all four values into the CPU 
> when you loaded %cr3. There was no "three-level page table walker" at all: 
> it was still a two-level page table walker, there were just for magic 
> internal page tables that were indexed off the two high bits.
>   

That just means we need to reload cr3 after populating the pgd with a
new pmd, right?

    J
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