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Message-ID: <20071120213746.GA21411@elte.hu>
Date: Tue, 20 Nov 2007 22:37:46 +0100
From: Ingo Molnar <mingo@...e.hu>
To: Marin Mitov <mitov@...p.bas.bg>
Cc: linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH] new TSC based delay_tsc()
hi Marin,
here's the patch we are carrying in x86.git at the moment - could you
please update it with v3 of your code, and send us the patch (with the
patch metadata kept intact, like you see it below)? Thanks,
Ingo
----------------->
From: Marin Mitov <mitov@...p.bas.bg>
Subject: new TSC based delay_tsc()
This is a patch based on the Ingo's idea/patch to track
delay_tsc() migration to another cpu by comparing
smp_processor_id().
What is different:
1. Using unsigned (instead of long) to unify for i386/x86_64.
2. Minimal preempt_disable/enable() critical sections
(more room for preemption)
3. some statements have been rearranged, to account for
possible under/overflow of left/TSC
Tested on both: 32/64 bit SMP PREEMPT kernel-2.6.24-rc3
Signed-off-by: Marin Mitov <mitov@...p.bas.bg>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
arch/x86/lib/delay_32.c | 35 +++++++++++++++++++++++++++++------
arch/x86/lib/delay_64.c | 36 ++++++++++++++++++++++++++++++------
2 files changed, 59 insertions(+), 12 deletions(-)
Index: linux/arch/x86/lib/delay_32.c
===================================================================
--- linux.orig/arch/x86/lib/delay_32.c
+++ linux/arch/x86/lib/delay_32.c
@@ -38,18 +38,41 @@ static void delay_loop(unsigned long loo
:"0" (loops));
}
-/* TSC based delay: */
+/* TSC based delay:
+ *
+ * We are careful about preemption as TSC's are per-CPU.
+ */
static void delay_tsc(unsigned long loops)
{
- unsigned long bclock, now;
+ unsigned prev, now;
+ unsigned left = loops;
+ unsigned prev_cpu, cpu;
+
+ preempt_disable();
+ rdtscl(prev);
+ prev_cpu = smp_processor_id();
+ preempt_enable();
+ now = prev;
- preempt_disable(); /* TSC's are per-cpu */
- rdtscl(bclock);
do {
rep_nop();
+
+ left -= now - prev;
+ prev = now;
+
+ preempt_disable();
rdtscl(now);
- } while ((now-bclock) < loops);
- preempt_enable();
+ cpu = smp_processor_id();
+ preempt_enable();
+
+ if (prev_cpu != cpu) {
+ /*
+ * We have migrated, we skip this small amount of time:
+ */
+ prev = now;
+ prev_cpu = cpu;
+ }
+ } while ((now-prev) < left);
}
/*
Index: linux/arch/x86/lib/delay_64.c
===================================================================
--- linux.orig/arch/x86/lib/delay_64.c
+++ linux/arch/x86/lib/delay_64.c
@@ -26,18 +26,42 @@ int read_current_timer(unsigned long *ti
return 0;
}
+/* TSC based delay:
+ *
+ * We are careful about preemption as TSC's are per-CPU.
+ */
void __delay(unsigned long loops)
{
- unsigned bclock, now;
+ unsigned prev, now;
+ unsigned left = loops;
+ unsigned prev_cpu, cpu;
+
+ preempt_disable();
+ rdtscl(prev);
+ prev_cpu = smp_processor_id();
+ preempt_enable();
+ now = prev;
- preempt_disable(); /* TSC's are pre-cpu */
- rdtscl(bclock);
do {
- rep_nop();
+ rep_nop();
+
+ left -= now - prev;
+ prev = now;
+
+ preempt_disable();
rdtscl(now);
+ cpu = smp_processor_id();
+ preempt_enable();
+
+ if (prev_cpu != cpu) {
+ /*
+ * We have migrated, we skip this small amount of time:
+ */
+ prev = now;
+ prev_cpu = cpu;
+ }
}
- while ((now-bclock) < loops);
- preempt_enable();
+ while ((now-prev) < left);
}
EXPORT_SYMBOL(__delay);
-
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