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Message-ID: <20071214151620.3469115a@the-village.bc.nu>
Date: Fri, 14 Dec 2007 15:16:20 +0000
From: Alan Cox <alan@...rguk.ukuu.org.uk>
To: "David P. Reed" <dpreed@...d.com>
Cc: David Newall <david@...idnewall.com>,
Rene Herman <rene.herman@...access.nl>,
Paul Rolland <rol@...917.net>,
"H. Peter Anvin" <hpa@...or.com>, Krzysztof Halasa <khc@...waw.pl>,
Pavel Machek <pavel@....cz>, Andi Kleen <andi@...stfloor.org>,
linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, rol@...be.net
Subject: Re: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64
with MCP51 laptops
On Thu, 13 Dec 2007 20:50:33 -0500
"David P. Reed" <dpreed@...d.com> wrote:
> Simulating 1 microsecond delays (assuming LPC meets that goal for 0x80)
> is "absolutely correct" for devices provided on PCI-X running on 3 GHz
> or greater machines?
Yes - the LPC bus clock doesn't change for the CPU clock.
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