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Date: Thu, 13 Dec 2007 20:50:33 -0500 From: "David P. Reed" <dpreed@...d.com> To: Alan Cox <alan@...rguk.ukuu.org.uk> CC: David Newall <david@...idnewall.com>, Rene Herman <rene.herman@...access.nl>, Paul Rolland <rol@...917.net>, "H. Peter Anvin" <hpa@...or.com>, Krzysztof Halasa <khc@...waw.pl>, Pavel Machek <pavel@....cz>, Andi Kleen <andi@...stfloor.org>, linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, rol@...be.net Subject: Re: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64 with MCP51 laptops Simulating 1 microsecond delays (assuming LPC meets that goal for 0x80) is "absolutely correct" for devices provided on PCI-X running on 3 GHz or greater machines? Well, you are entitled to your opinion. Seems likely that reading the timing specs of such a chipset might be correct, and delaying for a time proportional to CPU speed, rather than assuming running 3000 3GHz clock cycles is needed on a very fast emulation of an old device that probably runs at the fastest bus speed provided in the chipset. Every device has different timing constraints. In the real world that I live in. Alan Cox wrote: > On Thu, 13 Dec 2007 08:13:29 -0500 > "David P. Reed" <dpreed@...d.com> wrote: > > >> Perhaps what was meant is that ISA-tuned timings make little sense on >> devices that are part of the chipset or on the PCI or PCI-X buses? >> > > No. > > ISA as LPC bus is alive and well inside and outside chipsets. Welcome to > planet earth and the reality of 'its cheaper to reuse cells than design a > new one'. For the chipset logic like DMA controllers the _p is absolutely > correct. > > Alan > > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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