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Date:	Fri, 21 Dec 2007 09:59:46 -0500
From:	Bhavana Nagendra <bnagendr@...hat.com>
To:	tcamuso@...hat.com
CC:	Robert Hancock <hancockr@...w.ca>, Greg KH <gregkh@...e.de>,
	linux-kernel@...r.kernel.org, linux-pci@...ey.karlin.mff.cuni.cz,
	"Chumbalkar, Nagananda" <Nagananda.Chumbalkar@...com>,
	Prarit Bhargava <prarit@...hat.com>
Subject: Re: [Fwd: Re: [PATCH 0/5]PCI: x86 MMCONFIG]

Tony Camuso wrote:
>> Robert Hancock wrote:
>>
>> First off, I would like to see confirmation from the horses's mouths 
>> here (namely AMD, ServerWorks/Broadcom, and whoever else) that there 
>> is no other way to get around this problem than disabling MMCONFIG 
>> for accesses behind those chips.
>>
>>
>
> And here are the excerpts from that page of the spec which are salient
> to the present discussion:
>
> ----------------------------------------------------------------------
>
> The base configuration space of the AMD-8132 and PCI(-X) devices 
> attached to it are accessible using only
> the mechanism defined in PCI 2.3. Registers of PCI-X Mode 2 devices 
> attached to the AMD-8132 in the
> extended configuration space are not accessible. The AMD-8132 has no 
> registers in the extended
> configuration space.
>
> Fix Planned
> No
>
>
Prarit, Tony et al, this is as official as it gets.   It's pretty 
clearly stated.

Bhavana
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