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Message-Id: <20080103005006.BE79A14D40@wotan.suse.de>
Date: Thu, 3 Jan 2008 01:50:06 +0100 (CET)
From: Andi Kleen <ak@...e.de>
To: andreas.herrmann3@....com, linux-kernel@...r.kernel.org
Subject: [PATCH] [11/20] x86: Use the correct cpuid method to detect MWAIT support for C states
Previously there was a AMD specific quirk to handle the case of
AMD Fam10h MWAIT not supporting any C states. But it turns out
that CPUID already has ways to detectly detect that without
using special quirks.
The new code simply checks if MWAIT supports at least C1 and doesn't
use it if it doesn't. No more vendor specific code.
Credit goes to Ben Serebrin for pointing out the (nearly) obvious.
Cc: "Andreas Herrmann" <andreas.herrmann3@....com>
Signed-off-by: Andi Kleen <ak@...e.de>
---
arch/x86/kernel/cpu/amd.c | 3 ---
arch/x86/kernel/process_32.c | 10 +++++++++-
arch/x86/kernel/process_64.c | 11 ++++++++++-
arch/x86/kernel/setup_64.c | 4 ----
4 files changed, 19 insertions(+), 9 deletions(-)
Index: linux/arch/x86/kernel/cpu/amd.c
===================================================================
--- linux.orig/arch/x86/kernel/cpu/amd.c
+++ linux/arch/x86/kernel/cpu/amd.c
@@ -295,9 +295,6 @@ static void __cpuinit init_amd(struct cp
local_apic_timer_disabled = 1;
#endif
- if (c->x86 == 0x10 && !force_mwait)
- clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
-
/* K6s reports MCEs but don't actually have all the MSRs */
if (c->x86 < 6)
clear_bit(X86_FEATURE_MCE, c->x86_capability);
Index: linux/arch/x86/kernel/process_32.c
===================================================================
--- linux.orig/arch/x86/kernel/process_32.c
+++ linux/arch/x86/kernel/process_32.c
@@ -271,9 +271,17 @@ static void mwait_idle(void)
mwait_idle_with_hints(0, 0);
}
+static int mwait_usable(const struct cpuinfo_x86 *c)
+{
+ if (force_mwait)
+ return 1;
+ /* Any C1 states supported? */
+ return c->cpuid_level >= 5 && ((cpuid_edx(5) >> 4) & 0xf) > 0;
+}
+
void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
{
- if (cpu_has(c, X86_FEATURE_MWAIT)) {
+ if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
printk("monitor/mwait feature present.\n");
/*
* Skip, if setup has overridden idle.
Index: linux/arch/x86/kernel/process_64.c
===================================================================
--- linux.orig/arch/x86/kernel/process_64.c
+++ linux/arch/x86/kernel/process_64.c
@@ -270,10 +270,19 @@ static void mwait_idle(void)
}
}
+
+static int mwait_usable(const struct cpuinfo_x86 *c)
+{
+ if (force_mwait)
+ return 1;
+ /* Any C1 states supported? */
+ return c->cpuid_level >= 5 && ((cpuid_edx(5) >> 4) & 0xf) > 0;
+}
+
void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
{
static int printed;
- if (cpu_has(c, X86_FEATURE_MWAIT)) {
+ if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
/*
* Skip, if setup has overridden idle.
* One CPU supports mwait => All CPUs supports mwait
Index: linux/arch/x86/kernel/setup_64.c
===================================================================
--- linux.orig/arch/x86/kernel/setup_64.c
+++ linux/arch/x86/kernel/setup_64.c
@@ -760,10 +760,6 @@ static void __cpuinit init_amd(struct cp
/* MFENCE stops RDTSC speculation */
set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
- /* Family 10 doesn't support C states in MWAIT so don't use it */
- if (c->x86 == 0x10 && !force_mwait)
- clear_cpu_cap(c, X86_FEATURE_MWAIT);
-
if (amd_apic_timer_broken())
disable_apic_timer = 1;
}
--
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