linux-kernel - Re: [PATCH] AMD Thermal Interrupt Support

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Message-ID: <3f1a065b0801101821k71ea7523l5024f12abb50357f@mail.gmail.com>
Date:	Thu, 10 Jan 2008 18:21:09 -0800
From:	"Russell Leidich" <rml@...gle.com>
To:	"Andi Kleen" <andi@...stfloor.org>,
	"Torsten Kaiser" <just.for.lkml@...glemail.com>,
	"Andrew Morton" <akpm@...ux-foundation.org>,
	linux-kernel@...r.kernel.org,
	"Thomas Gleixner" <tglx@...utronix.de>,
	"Ingo Molnar" <mingo@...e.hu>, valdis.kletnieks@...edu,
	"Tim Hockin" <thockin@...gle.com>
Subject: Re: [PATCH] AMD Thermal Interrupt Support

All,

Here's the hopefully-final version of the patch, which I have just
tested on Intel and AMD.

In my AMD test, I happened to discover that although MCEs were being
logged, the MCE counter at
/sys/devices/system/cpu/cpu(whatever)/thermal_throttle/count was not
being updated.  I fixed this by (1) moving smp_thermal_init from
late_initcall to device_initcall in mce_amd_64.c (2) moving
thermal_throttle_init_device from device_initcall to late_initcall in
therm_throt.c.

Thanks to Andi for his notes on how to hack up an indirect call in
AT&T-style X86-64.

To reiterate my earlier general description of the patch:

This patch adds thermal machine check event (MCE) support to AMD
Barcelona (and probably later, if new PCI IDs are added to
k8_northbridges[]), styled after the same in the Intel code.  The
initialization consists of 3 parts: (1) northbridge, which enables the
delivery of the interrupt to the local APIC, (2) APIC, which enables
delivery to X86, and (3) hotplug support in threshold_cpu_callback(),
which accomplishes #2 for CPUs which (re)enter the OS later.

Whenever the temperature reaches the throttling threshold programmed
into a northbridge register (by the BIOS -- my code doesn't change
this value), a thermal interrupt is delivered.  The interrupt is
delivered to the vector specified in the thermal APIC register at
(APIC_BASE + 0x330), which is identical to Intel.  Because the vector
register is the same between both architectures, and because I don't
know which brand of CPU is present until runtime (if either),
thermal_interrupt in entry_64.S will branch to smp_thermal_interrupt
in mce_thermal.c.  In turn, smp_thermal_interrupt will branch to the
CPU-specific code for handling the interrupt.  (Apart from the common
vector location, AMD and Intel use radically different architectures
for the purpose of reporting throttling events.)  At that point, an
MCE is logged if and only if the temperature has made a low-to-high
transition.  Rate limiting is employed so as not to spam the log.

--
Russell Leidich

View attachment "patch.txt" of type "text/plain" (12226 bytes)