linux-kernel - Re: The SMP alternatives code breaks exception fixup?

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Message-ID: <p73zluymnx0.fsf@crumb.suse.de>
Date:	22 Jan 2008 06:26:03 +0100
From:	Andi Kleen <andi@...stfloor.org>
To:	Chuck Ebbert <cebbert@...hat.com>
Cc:	linux-kernel <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...e.hu>, Gerd Hoffmann <kraxel@...hat.com>
Subject: Re: The SMP alternatives code breaks exception fixup?

Chuck Ebbert <cebbert@...hat.com> writes:
> 
> There is a fixup, so this should never happen. But the lock instruction
> was replaced with a nop by the altinstruction code, and that makes the fixup
> address wrong. AFAICT we don't fix up the exception table when we replace
> a lock with a nop, which makes the fixup table point to the nop instead
> of the cmpxchg instruction and causes us to miss the fixup.

Indeed.  Nasty issue.

A quick fix would be to add another fixup to handle both cases
I checked the other LOCK_PREFIX users and they look ok.

Does this fix it?

-Andi

(untested) 

---

Add exception handlers for both the LOCK and no LOCK prefix
case in futex.

Hopefully fixes https://bugzilla.redhat.com/show_bug.cgi?id=429412

Signed-off-by: Andi Kleen <ak@...e.de>

Index: linux/include/asm-x86/futex.h
===================================================================
--- linux.orig/include/asm-x86/futex.h
+++ linux/include/asm-x86/futex.h
@@ -30,7 +30,7 @@
 "1:	movl	%2, %0\n					\
 	movl	%0, %3\n"					\
 	insn "\n"						\
-"2:	" LOCK_PREFIX "cmpxchgl %3, %2\n			\
+"2:	" LOCK_PREFIX "\n5: cmpxchgl %3, %2\n			\
 	jnz	1b\n						\
 3:	.section .fixup,\"ax\"\n				\
 4:	mov	%5, %1\n					\
@@ -38,7 +38,7 @@
 	.previous\n						\
 	.section __ex_table,\"a\"\n				\
 	.align	8\n"						\
-	_ASM_PTR "1b,4b,2b,4b\n					\
+	_ASM_PTR "1b,4b,2b,4b,5b,4b\n				\
 	.previous"						\
 	: "=&a" (oldval), "=&r" (ret), "+m" (*uaddr),		\
 	  "=&r" (tem)						\
--
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