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Date:	Wed, 23 Jan 2008 14:18:38 +0100
From:	Marc Pignat <marc.pignat@...s.ch>
To:	Haavard Skinnemoen <hskinnemoen@...el.com>
Cc:	Andrew Victor <linux@...im.org.za>, kernel@...32linux.org,
	linux-kernel@...r.kernel.org, Remy Bohmer <linux@...mer.net>,
	Chip Coldwell <coldwell@...hat.com>
Subject: Re: [PATCH 6/6] atmel_serial: Add DMA support

Hi!

On Wednesday 23 January 2008, Haavard Skinnemoen wrote:
> On Wed, 23 Jan 2008 13:30:32 +0100
> Marc Pignat <marc.pignat@...s.ch> wrote:
> > On Wednesday 23 January 2008, Haavard Skinnemoen wrote:
...
> 
> Ok, but then any power of two larger than the cache line size should be
> fine, assuming kmalloc() returns a properly aligned buffer.
Yes. The memory should be allocated using GFP_KERNEL | GFP_DMA flags, but this
is probably a nop on at91 and avr32.

I prepare a patch using the generic dma api (allocation + dma mapping in one
call = simpler code).

> 
> Other than that, I can't see any reason why a platform with 64 byte
> cache lines should need larger buffers than one with 32 byte cache
> lines.
If the memory at the end of the cacheline is used by the cpu, it will be
corrupted while you call dma_sync_single_for_cpu(..., DMA_FROM_DEVICE);

...
> There are still issues with the DMA code that the PIO code doesn't
> have. So I think it should be selectable until we can sort out the
> error/break handling.
ok

> 
> Haavard
> 

Regards

Marc


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