[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20080219194246.GA20438@linux-os.sc.intel.com>
Date: Tue, 19 Feb 2008 11:42:46 -0800
From: "Siddha, Suresh B" <suresh.b.siddha@...el.com>
To: Roland Dreier <rdreier@...co.com>
Cc: Arjan van de Ven <arjan@...radead.org>,
Andi Kleen <andi@...stfloor.org>,
Frans Pop <elendil@...net.nl>, linux-kernel@...r.kernel.org,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: Unable to continue testing of 2.6.25
On Mon, Feb 18, 2008 at 11:18:48AM -0800, Roland Dreier wrote:
> > > AFAIK mapping PCI memory WB is not allowed, so WC is really our only
> > > choice.
>
> > afaik that depends on the BAR being prefetchable or not.
>
> In my case the BAR is prefetchable.
Even if the BAR is prefetchable, on some platforms mapping MMIO space
as WB can cause bad results like machine check etc.
> > (and by your argument, ioremap_cached() would not be useful, and since that was, until
> > 2.6.25-rc1, the default behavior for ioremap(), would have caused massive problems)
>
> I'm not sure what ioremap_cached() would really do in my case, since
> the MTRRs for PCI memory are set to UC, so without monkeying with MTRR
> contents (which can't really be done safely) the only choices we have
> are leaving the mapping as UC or using PAT to get WC.
thanks,
suresh
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists