linux-kernel - Re: [PATCH] Document huge memory/cache overhead of memory controller in Kconfig

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Message-ID: <20080220185104.GA30416@elf.ucw.cz>
Date:	Wed, 20 Feb 2008 19:51:04 +0100
From:	Pavel Machek <pavel@....cz>
To:	Jan Engelhardt <jengelh@...putergmbh.de>
Cc:	Balbir Singh <balbir@...ux.vnet.ibm.com>,
	John Stoffel <john@...ffel.org>,
	Andi Kleen <andi@...stfloor.org>, akpm@...l.org,
	torvalds@...l.org, linux-kernel@...r.kernel.org, linux-mm@...ck.org
Subject: Re: [PATCH] Document huge memory/cache overhead of memory
	controller in Kconfig

On Wed 2008-02-20 19:28:03, Jan Engelhardt wrote:
> 
> On Feb 20 2008 18:19, Pavel Machek wrote:
> >> 
> >> For ordinary desktop people, memory controller is what developers
> >> know as MMU or sometimes even some other mysterious piece of silicon
> >> inside the heavy box.
> >
> >Actually I'd guess 'memory controller' == 'DRAM controller' == part of
> >northbridge that talks to DRAM.
> 
> Yeah that must have been it when Windows says it found a new controller
> after changing the mainboard underneath.

Just for fun... this option really has to be renamed:

Memory controller
~~~~~~~~~~~~~~~~~
>From Wikipedia, the free encyclopedia

The memory controller is a chip on a computer's motherboard or CPU die
which manages the flow of data going to and from the memory.

Most computers based on an Intel processor have a memory controller
implemented on their motherboard's north bridge, though some modern
microprocessors, such as AMD's Athlon 64 and Opteron processors, IBM's
POWER5, and Sun Microsystems UltraSPARC T1 have a memory controller on
the CPU die to reduce the memory latency. 

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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