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Message-ID: <Pine.LNX.4.58.0802220845060.15391@gandalf.stny.rr.com>
Date:	Fri, 22 Feb 2008 08:46:16 -0500 (EST)
From:	Steven Rostedt <rostedt@...dmis.org>
To:	Ingo Molnar <mingo@...e.hu>
cc:	gregory.haskins@...il.com, Gregory Haskins <ghaskins@...ell.com>,
	a.p.zijlstra@...llo.nl, tglx@...utronix.de,
	linux-rt-users@...r.kernel.org, linux-kernel@...r.kernel.org,
	bill.huey@...il.com, kevin@...man.org, cminyard@...sta.com,
	dsingleton@...sta.com, dwalker@...sta.com, npiggin@...e.de,
	dsaxena@...xity.net, ak@...e.de, gregkh@...e.de,
	sdietrich@...ell.com, pmorreale@...ell.com, mkohari@...ell.com
Subject: Re: [PATCH [RT] 05/14] rearrange rt_spin_lock sleep


Gregory,

I guess we should have just read Documentation/memory-barriers.text

Here's the snippet:


Any atomic operation that modifies some state in memory and returns
information
about the state (old or new) implies an SMP-conditional general memory
barrier
(smp_mb()) on each side of the actual operation (with the exception of
explicit lock operations, described later).  These include:

        xchg();
        cmpxchg();
        atomic_cmpxchg();
        atomic_inc_return();
        atomic_dec_return();
        atomic_add_return();
        atomic_sub_return();
        atomic_inc_and_test();
        atomic_dec_and_test();
        atomic_sub_and_test();
        atomic_add_negative();
        atomic_add_unless();
        test_and_set_bit();
        test_and_clear_bit();
        test_and_change_bit();


-- Steve

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