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Date: Tue, 11 Mar 2008 11:22:45 -0700
From: chrisw@...s-sol.org
To: tglx@...utronix.de, chrisw@...s-sol.org, jbeulich@...ell.com,
jpiszcz@...idpixels.com, linux-kernel@...r.kernel.org,
mingo@...e.hu, stable@...nel.org
Cc: stable@...nel.org, stable-commits@...r.kernel.org
Subject: patch x86-adjust-enable_nmi_through_lvt0.patch queued to 2.6.24-stable tree
This is a note to let you know that we have just queued up the patch titled
Subject: x86: adjust enable_NMI_through_LVT0()
to the 2.6.24-stable tree. Its filename is
x86-adjust-enable_nmi_through_lvt0.patch
A git repo of this tree can be found at
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
>From stable-bounces@...ux.kernel.org Tue Mar 11 11:09:24 2008
Date: Tue, 11 Mar 2008 11:30:25 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Justin Piszcz <jpiszcz@...idpixels.com>
Message-ID: <alpine.LFD.1.00.0803111104550.3781@...llo.tec.linutronix.de>
Cc: LKML <linux-kernel@...r.kernel.org>, Stable Team <stable@...nel.org>
Subject: x86: adjust enable_NMI_through_LVT0()
commit e94271017f0933b29362a3c9dea5a6b9d04d98e1
From: Jan Beulich <jbeulich@...ell.com>
Date: Wed Jan 30 13:31:24 2008 +0100
Its previous use in a call to on_each_cpu() was pointless, as at the
time that code gets executed only one CPU is online. Further, the
function can be __cpuinit, and for this to work without
CONFIG_HOTPLUG_CPU setup_nmi() must also get an attribute (this one
can even be __init; on 64-bits check_timer() also was lacking that
attribute).
Signed-off-by: Jan Beulich <jbeulich@...ell.com>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
[ tglx@...utronix.de: backport to 2.6.24.3]
Cc: Justin Piszcz <jpiszcz@...idpixels.com>
Signed-off-by: Chris Wright <chrisw@...s-sol.org>
---
arch/x86/kernel/apic_32.c | 2 +-
arch/x86/kernel/apic_64.c | 2 +-
arch/x86/kernel/io_apic_32.c | 4 ++--
arch/x86/kernel/io_apic_64.c | 6 +++---
arch/x86/kernel/smpboot_32.c | 2 +-
arch/x86/kernel/smpboot_64.c | 2 +-
include/asm-x86/apic_32.h | 2 +-
include/asm-x86/io_apic_64.h | 2 +-
8 files changed, 11 insertions(+), 11 deletions(-)
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -154,7 +154,7 @@ unsigned long safe_apic_wait_icr_idle(vo
/**
* enable_NMI_through_LVT0 - enable NMI through local vector table 0
*/
-void enable_NMI_through_LVT0 (void * dummy)
+void __cpuinit enable_NMI_through_LVT0(void)
{
unsigned int v = APIC_DM_NMI;
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -151,7 +151,7 @@ unsigned int safe_apic_wait_icr_idle(voi
return send_status;
}
-void enable_NMI_through_LVT0 (void * dummy)
+void enable_NMI_through_LVT0(void)
{
unsigned int v;
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -2080,7 +2080,7 @@ static struct irq_chip lapic_chip __read
.eoi = ack_apic,
};
-static void setup_nmi (void)
+static void __init setup_nmi(void)
{
/*
* Dirty trick to enable the NMI watchdog ...
@@ -2093,7 +2093,7 @@ static void setup_nmi (void)
*/
apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ...");
- on_each_cpu(enable_NMI_through_LVT0, NULL, 1, 1);
+ enable_NMI_through_LVT0();
apic_printk(APIC_VERBOSE, " done.\n");
}
--- a/arch/x86/kernel/io_apic_64.c
+++ b/arch/x86/kernel/io_apic_64.c
@@ -1565,7 +1565,7 @@ static struct hw_interrupt_type lapic_ir
.end = end_lapic_irq,
};
-static void setup_nmi (void)
+static void __init setup_nmi(void)
{
/*
* Dirty trick to enable the NMI watchdog ...
@@ -1578,7 +1578,7 @@ static void setup_nmi (void)
*/
printk(KERN_INFO "activating NMI Watchdog ...");
- enable_NMI_through_LVT0(NULL);
+ enable_NMI_through_LVT0();
printk(" done.\n");
}
@@ -1654,7 +1654,7 @@ static inline void unlock_ExtINT_logic(v
*
* FIXME: really need to revamp this for modern platforms only.
*/
-static inline void check_timer(void)
+static inline void __init check_timer(void)
{
struct irq_cfg *cfg = irq_cfg + 0;
int apic1, pin1, apic2, pin2;
--- a/arch/x86/kernel/smpboot_32.c
+++ b/arch/x86/kernel/smpboot_32.c
@@ -405,7 +405,7 @@ static void __cpuinit start_secondary(vo
setup_secondary_clock();
if (nmi_watchdog == NMI_IO_APIC) {
disable_8259A_irq(0);
- enable_NMI_through_LVT0(NULL);
+ enable_NMI_through_LVT0();
enable_8259A_irq(0);
}
/*
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -338,7 +338,7 @@ void __cpuinit start_secondary(void)
if (nmi_watchdog == NMI_IO_APIC) {
disable_8259A_irq(0);
- enable_NMI_through_LVT0(NULL);
+ enable_NMI_through_LVT0();
enable_8259A_irq(0);
}
--- a/include/asm-x86/apic_32.h
+++ b/include/asm-x86/apic_32.h
@@ -109,7 +109,7 @@ extern void setup_boot_APIC_clock (void)
extern void setup_secondary_APIC_clock (void);
extern int APIC_init_uniprocessor (void);
-extern void enable_NMI_through_LVT0 (void * dummy);
+extern void enable_NMI_through_LVT0(void);
#define ARCH_APICTIMER_STOPS_ON_C3 1
--- a/include/asm-x86/io_apic_64.h
+++ b/include/asm-x86/io_apic_64.h
@@ -129,7 +129,7 @@ extern int io_apic_set_pci_routing (int
extern int sis_apic_bug; /* dummy */
-void enable_NMI_through_LVT0 (void * dummy);
+void enable_NMI_through_LVT0(void);
extern spinlock_t i8259A_lock;
Patches currently in stable-queue which might be from tglx@...utronix.de are
queue-2.6.24/x86-adjust-enable_nmi_through_lvt0.patch
--
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