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Message-ID: <20080313184938.7e27acf8@mjolnir.drzeus.cx>
Date: Thu, 13 Mar 2008 18:49:38 +0100
From: Pierre Ossman <drzeus-list@...eus.cx>
To: Len Brown <lenb@...nel.org>
Cc: linux-pm@...ts.linux-foundation.org, Pavel Machek <pavel@....cz>,
LKML <linux-kernel@...r.kernel.org>,
Adam Belay <abelay@...ell.com>,
Andi Kleen <andi@...stfloor.org>,
Lee Revell <rlrevell@...-job.com>
Subject: Re: [linux-pm] [PATCH] cpuidle: avoid singing capacitors
On Thu, 13 Mar 2008 17:34:37 +0100
Pierre Ossman <drzeus-list@...eus.cx> wrote:
>
> It does not. But my C3 desc looks like this:
>
> state3/desc:ACPI FFH INTEL MWAIT 0x50
>
> What's the meaning of the last number?
>
I've surfed Intel's web site for a bit, and found the MWAIT instruction in the arch docs. Unfortunately, it does not explain the value 0x50. According to the docs, that would be C6, which is not listed in the regular set of states for the Core 2. I did find this however:
http://www.trustedreviews.com/cpu-memory/review/2007/03/30/Intel-Processor-Roadmap-Penryn-Nehalem-and-the-Future/p2
It says that C6 is some ultra low power mode where more or less the entire chip is powered down.
Len, Venkatesh, do you have some insight? And is it harmless to move to more power hungry modes (i.e. C4 or C3).
Rgds
--
-- Pierre Ossman
Linux kernel, MMC maintainer http://www.kernel.org
PulseAudio, core developer http://pulseaudio.org
rdesktop, core developer http://www.rdesktop.org
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