linux-kernel - Re: [PATCH 1/3 v3] dma: document dma_{un}map_{single|sg}

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Message-Id: <1205469029.7414.18.camel@concordia.ozlabs.ibm.com>
Date:	Fri, 14 Mar 2008 15:30:29 +1100
From:	Michael Ellerman <michael@...erman.id.au>
To:	akepner@....com
Cc:	James Bottomley <James.Bottomley@...senPartnership.com>,
	Grant Grundler <grundler@...isc-linux.org>,
	Tony Luck <tony.luck@...el.com>,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Jes Sorensen <jes@....com>,
	Randy Dunlap <randy.dunlap@...cle.com>,
	Roland Dreier <rdreier@...co.com>,
	David Miller <davem@...emloft.net>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	linux-kernel@...r.kernel.org, Mark Nelson <mdnelson@....ibm.com>
Subject: Re: [PATCH 1/3 v3] dma: document dma_{un}map_{single|sg}_attrs()
	interface

On Tue, 2008-03-11 at 18:19 -0700, akepner@....com wrote:
> I have a new proposal for the documentation portion of this 
> patchset. The code changes essentially amount to 
> s/DMA_ATTR_SYNC_ON_WRITE/DMA_ATTR_BARRIER/ so thought I'd send 
> just the doc change for comments now.
> 
> The description of the DMA_ATTR_BARRIER is now very short and 
> generic - no particular architecture is even mentioned. I can add 
> a sentence or two near the architecture-specific changes in 
> arch/ia64/sn/pci/pci_dma.c about why the implementation works 
> on ia64/sn, etc.

I like this better, sorry to keep nitpicking, but just a few comments
below ..

> diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
> index e69de29..a4106ec 100644
> --- a/Documentation/DMA-attributes.txt
> +++ b/Documentation/DMA-attributes.txt
> @@ -0,0 +1,24 @@
> +			DMA attributes
> +			==============
> +
> +This document describes the semantics of the DMA attributes that are 
> +defined in linux/dma-attrs.h. 
> +
> +DMA_ATTR_BARRIER
> +----------------
> +
> +DMA_ATTR_BARRIER is a barrier attribute for DMA.  DMA to a memory 
> +region with the DMA_ATTR_BARRIER attribute forces all pending DMA 
> +writes to complete, and thus provides a mechanism to strictly order 
> +DMA from a device across all intervening busses and bridges.  This 
> +barrier is not specific to a particular type of interconnect, it 
> +applies to the system as a whole, and so its implementation must 
> +account for the idiosyncracies of the system all the way from the 
> +DMA device to memory. 

You say a "DMA to a memory region with the DMA_ATTR_BARRIER attribute
forces all pending DMA writes to complete". Does it force _all_ DMA
writes to complete, or just writes to the region, or just writes coming
from devices? What if something is writing to a device?

Does DMA_ATTR_BARRIER have any effect on reads?

cheers

-- 
Michael Ellerman
OzLabs, IBM Australia Development Lab

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person

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