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Message-ID: <1FE6DD409037234FAB833C420AA843ECE5B84D@orsmsx424.amr.corp.intel.com>
Date:	Mon, 24 Mar 2008 14:13:38 -0700
From:	"Luck, Tony" <tony.luck@...el.com>
To:	"Christoph Lameter" <clameter@....com>,
	"David Miller" <davem@...emloft.net>
Cc:	<linux-mm@...ck.org>, <linux-kernel@...r.kernel.org>,
	<linux-ia64@...r.kernel.org>
Subject: RE: [11/14] vcompound: Fallbacks for order 1 stack allocations on IA64 and x86

> I am familiar with that area and I am resonably sure that this 
> is an issue on IA64 under some conditions (the processor decides to spill 
> some registers either onto the stack or into the register backing store 
> during tlb processing). Recursion (in the kernel context) still expects 
> the stack and register backing store to be available. ccing linux-ia64 for 
> any thoughts to the contrary.

Christoph is correct ... IA64 pins the TLB entry for the kernel stack
(which covers both the normal C stack and the register backing store)
so that it won't have to deal with a TLB miss on the stack while handling
another TLB miss.

-Tony
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