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Message-ID: <20080326221027.GA7959@elte.hu>
Date: Wed, 26 Mar 2008 23:10:27 +0100
From: Ingo Molnar <mingo@...e.hu>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>,
Ivan Kokshaysky <ink@...assic.park.msu.ru>,
Gary Hade <garyhade@...ibm.com>,
Thomas Meyer <thomas@...3r.de>,
Stefan Richter <stefanr@...6.in-berlin.de>,
Thomas Gleixner <tglx@...utronix.de>,
"Rafael J. Wysocki" <rjw@...k.pl>,
LKML <linux-kernel@...r.kernel.org>,
Adrian Bunk <bunk@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Natalie Protasevich <protasnb@...il.com>, pm@...ian.org
Subject: Re: [patch] pci: revert "PCI: remove transparent bridge sizing"
* Benjamin Herrenschmidt <benh@...nel.crashing.org> wrote:
> > NOTE! This will also consider a bridge resource at 0 to be an
> > invalid resource (since now the alignment will be zero), which is a
> > bit odd and makes me worry a bit. I wouldn't be surprised if some
> > non-PC architectures have PCI bridges at zero. But maybe they should
> > be (or already are?) marked IORESOURCE_PCI_FIXED?
>
> PCI bridges at zero is perfectly valid indeed and I'm sure we have
> that around at least for IO space. In fact, I'm surprised you don't
> have that on x86. Typically, things like an HT segment with a P2P
> bridge and behind that bridge an ISA bridge could well have the P2P
> bridge with a resource forwarding 0...0x1000 IO downstream for example
> even on x86 no ? (I'm not -that- familiar with the crazyness of legacy
> ISA on x86 but I've definitely seen such setup on other archs).
0..0x1000 physical memory (== bus memory on x86) is reserved to the BIOS
as RAM in essence and that legacy will be with us for at least 100 or
maybe 200 years ;-)
Ingo
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