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Message-ID: <47F11616.3020403@linux.intel.com>
Date: Mon, 31 Mar 2008 09:49:26 -0700
From: Arjan van de Ven <arjan@...ux.intel.com>
To: Thomas Hellström <thomas@...gstengraphics.com>
CC: Andi Kleen <andi@...stfloor.org>, Dave Airlie <airlied@...hat.com>,
linux-kernel@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com
Subject: Re: [PATCH] x86: create array based interface to change page attribute
Thomas Hellström wrote:
> Arjan van de Ven wrote:
>> Thomas Hellström wrote:
>>
>>> Let me rehprase. Not really time-critical but it is of some
>>> importance that CPA is done quickly.
>>> We're dealing with the tradeoff of reading from uncached device memory
>>
>> uncached or write combining ?
> The user-space mappings (the ones that we really use) are usually
> write-combined, whereas the kernel mappings are uncached. (I think this
> is OK since both mapping types implies no cache coherency).
This is not officially allowed and may tripple fault your cpu..
To comply with the spec one needs to have ALL mappings the same unfortunately.
(And yes, this is a hard problem)
>Even if
> (IIRC) write combining is theoretically prefetchable, some devices give
> read speeds around 9MB/s.
>>
>>> vs taking the pages out of
>>> AGP, setting up a cache-coherent mapping, read and then change back.
>>> What we'd really would like to set up is a pool of completely
>>> unmapped (like highmem) pages. Then we could, to a large extent,
>>> avoid the CPA calls.
>>
>> changing attributes by nature means a tlb flush and a bunch of
>> expensive cache work.
>> That's never going to be cheap, I guess it all depends on how much
>> work you do
>> on the memory for it to pay off or not...
> Indeed. Actually with the new non-wbinvd() CPA, We seem to benefit
> already if the buffer is a single page, though it's probably hard to
> measure the impact of repopulating the tlb.
>
> /Thomas
>
>
>
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