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Message-Id: <1209834123.6972.48.camel@localhost>
Date: Sat, 03 May 2008 13:02:03 -0400
From: jamal <hadi@...erus.ca>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Suresh Siddha <suresh.b.siddha@...el.com>,
Arjan van de Ven <arjan@...ux.intel.com>,
Ingo Molnar <mingo@...e.hu>,
LKML <linux-kernel@...r.kernel.org>,
"H. Peter Anvin" <hpa@...or.com>, Jan Beulich <jbeulich@...ell.com>
Subject: Re: i387/FPU init issues...
On Sat, 2008-03-05 at 17:31 +0200, Thomas Gleixner wrote:
> On Sat, 3 May 2008, jamal wrote:
> > =======================
> > Code: 8d 74 26 00 8d bc 27 00 00 00 00 55 89 c2 8b 40 04 89 e5 f6 40 0c
> > 01 74 32 8b 82 60 02 00 00 0f ae 00 0f ba 60 02 07 73 02 db e2 <0f> 1f
> > 00 90 8d b4 26 00 00 00 00 89 f6 8b 42 04 83 60 0c fe 0f
>
> This looks bad.
>
> 0f ae 00 fxsave (%eax)
> 0f ba 60 02 07 btl $0x7,0x2(%eax)
> 73 02 jae (skip fnclex)
> db e2 fnclex
> 0f 1f 00 nopl (%eax)
>
> ^^^^ This is a P4+ instruction. So it's not surprising that the P2
> chokes. The question is where this comes from.
>
> we have:
> #define P6_NOP3 ".byte 0x0f,0x1f,0x00\n"
Dang - I feel i should have saved myself all that git bisecting
and just posted the oops ;->
> So the alternatives code applies the wrong nop padding for your
> CPU. This was probably introduced with commit
> 32c464f5d9701db45bc1673288594e664065388e.
>
> Jan, are you sure that P3 knows the P6 NOPs ? AFAICT its P4, but I
> have to dig up the manuals.
>
> Jamal, does the following patch solve your problem ?
Indeed it does - thanks.
> Please provide
> also output of /proc/cpuinfo.
mambo:~# cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 3
model name : Pentium II (Klamath)
stepping : 3
cpu MHz : 1063.771
cache size : 128 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu de pse tsc msr pae mce cx8 sep pge cmov mmx fxsr
sse sse2
bogomips : 2160.92
clflush size : 32
power management:
cheers,
jamal
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