linux-kernel - Re: HELP: Is writeq an atomic operation??

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Message-ID: <adak5ic2qoe.fsf@cisco.com>
Date:	Fri, 02 May 2008 17:10:25 -0700
From:	Roland Dreier <rdreier@...co.com>
To:	"Moore\, Eric" <Eric.Moore@....com>
Cc:	<linux-kernel@...r.kernel.org>
Subject: Re: HELP:  Is writeq an atomic operation??

 > Under platforms where writeq is not defined, what should I do?

Umm... is it too late to change your chip design?

Seriously, for example on PowerPC 440SPe (which has a PCIe bus on a
32-bit PowerPC core), I don't know any way you can generate a 64-bit PCI
transaction.  Even on 32-bit x86 I think you're stuck using something
ugly like MMX to do it.

Basically it's going to be architecture-dependent at best.

 - R.
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