linux-kernel - RE: [PATCH 07/56] microblaze

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Message-Id: <1210033550.5798.185.camel@localhost>
Date:	Tue, 06 May 2008 10:25:50 +1000
From:	John Williams <john.williams@...alogix.com>
To:	Stephen Neuendorffer <stephen.neuendorffer@...inx.com>
Cc:	monstr@...nam.cz, linux-kernel@...r.kernel.org, arnd@...db.de,
	linux-arch@...r.kernel.org, John Linn <linnj@...inx.com>,
	matthew@....cx, will.newton@...il.com, drepper@...hat.com,
	microblaze-uclinux@...e.uq.edu.au, grant.likely@...retlab.ca,
	Michal Simek <monstr@...str.eu>
Subject: RE: [PATCH 07/56] microblaze_v2: Signal support

On Mon, 2008-05-05 at 17:13 -0700, Stephen Neuendorffer wrote:
> I'm somewhat ignorant about what this code is attempting to do, but with
> some quick poking around (m68knommu, blackfin) seems to suggest that
> other architectures don't do this, while others (v850) have almost
> exactly the same code (although they are somewhat smarter and are
> careful not to flush the whole cache).
> 
> At the very least, it seems like there is some work in this area needed.

flush_cache_sigtramp should just invalidate 8 bytes up from the base
address of the trampoline.  This is just the region on the process stack
where we insert a kind of call-back back.  Writing the opcodes goes via
the dcache, and so there's a vanishingly small possibility that the CPU
will get a false hit on on an icache fetch when the code is executed.

That was what Michal's patch had when I scanned it yesterday.  It
certainly won't/shouldn't be invalidating the entire cache.

Cheers,

John


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