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Message-ID: <483193B3.3090807@firstfloor.org>
Date:	Mon, 19 May 2008 16:50:27 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
CC:	Ingo Molnar <mingo@...e.hu>, Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] I/O APIC: Timer through 8259A revamp


>  With the ACPI tables, hardware is modern enough the timer interrupt 
> should be directly available, but is usually wired in the way recommended 
> by the MP spec.

I originally had that assumption too, but in practice that doesn't seem
to be always the case unfortunately. Or sometimes the tests just fail
for whatever reason and they drop into the fallback path.

>  That is the output of the master 8259A goes to INT0 of 
> the I/O APIC (or is only connected to local APICs) and the timer is routed 
> to INT2.  

There are already a couple of wiring differences in common chipsets.
Mostly hurts on the fallback path especially when multiple sources are 
enabled (then you might end up with duplicated interrupts, happened often
on ATI systems)

>  The use of the local APIC timer as a replacement was recommended back
> then,

That was before CPU power saving was invented I guess @)

> but I think IRQ8 from the RTC was also a good solution, 

Trouble on Linux is that RTC doesn't support any of the traditional HZ 
values. I considered writing a RTC driver back then, but didn't do
it because of this. 

On the other hand with wider use of tickless kernels and hrtimers it might 
be tolerable to use non standard HZ,

-Andi
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