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Message-Id: <87931b0e60bf1ad01a8c.1211268378@localhost>
Date: Tue, 20 May 2008 08:26:18 +0100
From: Jeremy Fitzhardinge <jeremy@...p.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Andrew Morton <akpm@...ux-foundation.org>,
Ingo Molnar <mingo@...e.hu>,
LKML <linux-kernel@...r.kernel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Hugh Dickins <hugh@...itas.com>, Theodore Tso <tytso@....edu>,
Gabriel C <nix.or.die@...glemail.com>,
Keith Packard <keithp@...thp.com>,
"Pallipadi, Venkatesh" <venkatesh.pallipadi@...el.com>,
Eric Anholt <eric@...olt.net>,
"Siddha, Suresh B" <suresh.b.siddha@...el.com>, airlied@...ux.ie,
"Barnes, Jesse" <jesse.barnes@...el.com>,
"Rafael J. Wysocki" <rjw@...k.pl>
Subject: [PATCH 2 of 8] x86: fix warning on 32-bit non-PAE
Fix the warning:
include2/asm/pgtable.h: In function `pte_modify':
include2/asm/pgtable.h:290: warning: left shift count >= width of type
On 32-bit PAE the virtual and physical addresses are both 32-bits,
so it ends up evaluating 1<<32. Do the shift as a 64-bit shift then
cast to the appropriate size. This should all be done at compile time,
and so have no effect on generated code.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@...rix.com>
---
include/asm-x86/page.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -29,7 +29,7 @@
/* to align the pointer to the (next) page boundary */
#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
-#define __PHYSICAL_MASK ((((phys_addr_t)1) << __PHYSICAL_MASK_SHIFT) - 1)
+#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
#ifndef __ASSEMBLY__
--
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