linux-kernel - PIIX4 DMA Timeout

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Message-ID: <001901c8ba74$4662ec80$01fca8c0@microsof60b8d6>
Date:	Tue, 20 May 2008 20:23:11 +0800
From:	"Gavin Shan" <shan.gavin.cn@...il.com>
To:	<linux-kernel@...r.kernel.org>
Subject: PIIX4 DMA Timeout

Hi All,

There has one MV64460 on my board, which includes 2 PCI bridges. PIIX4 is on slot 3 of PCI1.
But now, IDE driver reported it's timeouted on DMA operation. Thanks in advance for your
suggestions.

Resources of PIIX4 function 1
=====================
0001:00:03.1: idx=0 flags=0x20000110 start=0x00000000 end=0x00000007
0001:00:03.1: idx=1 flags=0x20000110 start=0x00000000 end=0x00000000
0001:00:03.1: idx=2 flags=0x20000110 start=0x00000000 end=0x00000007
0001:00:03.1: idx=3 flags=0x20000110 start=0x00000000 end=0x00000000
0001:00:03.1: idx=4 flags=0x00000101 start=0xd8000000 end=0xd800000f

Console Output
============
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
PIIX4: IDE controller at PCI slot 0001:00:03.1
0001:00:03.1: idx=0 flags=0x20000110 start=0x00000000 end=0x00000007
0001:00:03.1: idx=1 flags=0x20000110 start=0x00000000 end=0x00000000
0001:00:03.1: idx=2 flags=0x20000110 start=0x00000000 end=0x00000007
0001:00:03.1: idx=3 flags=0x20000110 start=0x00000000 end=0x00000000
0001:00:03.1: idx=4 flags=0x00000101 start=0xd8000000 end=0xd800000f
PIIX4: chipset revision 1
PIIX4: not 100% native mode: will probe irqs later
    ide0: BM-DMA at 0xd8000000-0xd8000007, BIOS settings: hda:pio, hdb:pio
    ide1: BM-DMA at 0xd8000008-0xd800000f, BIOS settings: hdc:pio, hdd:pio
hdc: HTE721010G9AT00, ATA DISK drive
hdc: max request size: 512KiB
hdc: 195371568 sectors (100030 MB) w/7539KiB Cache, CHS=16383/255/63, UDMA(33)
hdc: cache flushes supported
 hdc:<4>hdc: dma_timer_expiry: dma status == 0x26
hdc: DMA interrupt recovery
hdc: lost interrupt
hdc: dma_intr: status=0x58 { DriveReady SeekComplete DataRequest }
ide: failed opcode was: unknown
hdc: DMA disabled
ide1: reset: success
 hdc2 hdc3 hdc4

Thanks in advance,
Gavin