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Message-Id: <200806011901.23619.mitov@issp.bas.bg>
Date: Sun, 1 Jun 2008 19:01:23 +0300
From: Marin Mitov <mitov@...p.bas.bg>
To: LKML <linux-kernel@...r.kernel.org>
Cc: Steven Rostedt <rostedt@...dmis.org>,
Thomas Gleixner <tglx@...utronix.de>,
linux-rt-users <linux-rt-users@...r.kernel.org>, akpm@...l.org,
Ingo Molnar <mingo@...e.hu>,
Clark Williams <clark.williams@...il.com>,
Peter Zijlstra <peterz@...radead.org>,
"Luis Claudio R. Goncalves" <lclaudio@...g.org>,
Gregory Haskins <ghaskins@...ell.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andi Kleen <andi-suse@...stfloor.org>
Subject: [PATCH][resubmit] x86: enable preemption in delay
Hi all,
This is a resubmit of the patch proposed by Ingo and me
few month ago:
http://lkml.org/lkml/2007/11/20/343
It was in -mm for a while and then removed due to a move into
the mainline, but it never appeared in it.
As recently a new discussion started on the subject I decided
to resubmit it again.
Now it is against 2.6.25.4, but as far as there are no changes
in the modified files it should apply to 2.6.26-rc4 too.
Comments/critics are wellcome.
Marin Mitov
Signed-off-by: Marin Mitov <mitov@...p.bas.bg>
Signed-off-by: Ingo Molnar <mingo@...e.hu>
=========================================
--- a/arch/x86/lib/delay_32.c 2007-11-18 08:14:05.000000000 +0200
+++ b/arch/x86/lib/delay_32.c 2007-11-20 19:03:52.000000000 +0200
@@ -40,18 +40,42 @@
:"0" (loops));
}
-/* TSC based delay: */
+/* TSC based delay:
+ *
+ * We are careful about preemption as TSC's are per-CPU.
+ */
static void delay_tsc(unsigned long loops)
{
- unsigned long bclock, now;
+ unsigned prev, prev_1, now;
+ unsigned left = loops;
+ unsigned prev_cpu, cpu;
+
+ preempt_disable();
+ rdtscl(prev);
+ prev_cpu = smp_processor_id();
+ preempt_enable();
+ now = prev;
- preempt_disable(); /* TSC's are per-cpu */
- rdtscl(bclock);
do {
rep_nop();
+
+ left -= now - prev;
+ prev = now;
+
+ preempt_disable();
+ rdtscl(prev_1);
+ cpu = smp_processor_id();
rdtscl(now);
- } while ((now-bclock) < loops);
- preempt_enable();
+ preempt_enable();
+
+ if (prev_cpu != cpu) {
+ /*
+ * We have migrated, forget prev_cpu's tsc reading
+ */
+ prev = prev_1;
+ prev_cpu = cpu;
+ }
+ } while ((now-prev) < left);
}
/*
--- a/arch/x86/lib/delay_64.c 2007-11-18 08:14:40.000000000 +0200
+++ b/arch/x86/lib/delay_64.c 2007-11-20 19:47:29.000000000 +0200
@@ -28,18 +28,42 @@
return 0;
}
+/* TSC based delay:
+ *
+ * We are careful about preemption as TSC's are per-CPU.
+ */
void __delay(unsigned long loops)
{
- unsigned bclock, now;
+ unsigned prev, prev_1, now;
+ unsigned left = loops;
+ unsigned prev_cpu, cpu;
+
+ preempt_disable();
+ rdtscl(prev);
+ prev_cpu = smp_processor_id();
+ preempt_enable();
+ now = prev;
- preempt_disable(); /* TSC's are pre-cpu */
- rdtscl(bclock);
do {
- rep_nop();
+ rep_nop();
+
+ left -= now - prev;
+ prev = now;
+
+ preempt_disable();
+ rdtscl(prev_1);
+ cpu = smp_processor_id();
rdtscl(now);
- }
- while ((now-bclock) < loops);
- preempt_enable();
+ preempt_enable();
+
+ if (prev_cpu != cpu) {
+ /*
+ * We have migrated, forget prev_cpu's tsc reading
+ */
+ prev = prev_1;
+ prev_cpu = cpu;
+ }
+ } while ((now-prev) < left);
}
EXPORT_SYMBOL(__delay);
-
--
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