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Message-ID: <42DFA526FC41B1429CE7279EF83C6BDC01404341@pdsmsx415.ccr.corp.intel.com>
Date:	Mon, 9 Jun 2008 19:15:58 +0800
From:	"Chen, Huacai" <huacai.chen@...el.com>
To:	<linux-mips@...ux-mips.org>, <linux-kernel@...r.kernel.org>
Subject: [patch]modify the MIPS CPU classfication

The company ID of Loongson1/Loongson2 is PRID_COMP_LEGACY, but they were
classified in the list whoes company ID is  PRID_COMP_MIPS. This patch
move them to the right place.

Signed-off-by: Huacai Chen <huacai.chen@...el.com>

-----
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac..d3ffe93 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -68,6 +68,8 @@
 #define PRID_IMP_RM9000        0x3400
 #define PRID_IMP_R5432     0x5400
 #define PRID_IMP_R5500     0x5500
+#define PRID_IMP_LOONGSON1      0x4200
+#define PRID_IMP_LOONGSON2      0x6300

 #define PRID_IMP_UNKNOWN   0xff00

@@ -90,8 +92,6 @@
 #define PRID_IMP_24KE      0x9600
 #define PRID_IMP_74K       0x9700
 #define PRID_IMP_1004K     0x9900
-#define PRID_IMP_LOONGSON1      0x4200
-#define PRID_IMP_LOONGSON2      0x6300

 /*
  * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
-----
--
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