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Message-Id: <200806122127.19230.nickpiggin@yahoo.com.au>
Date: Thu, 12 Jun 2008 21:27:18 +1000
From: Nick Piggin <nickpiggin@...oo.com.au>
To: Jesse Barnes <jbarnes@...tuousgeek.org>
Cc: linux-arch@...r.kernel.org, Roland Dreier <rdreier@...co.com>,
James Bottomley <James.Bottomley@...senpartnership.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Matthew Wilcox <matthew@....cx>,
Trent Piepho <tpiepho@...escale.com>,
Russell King <rmk+lkml@....linux.org.uk>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
David Miller <davem@...emloft.net>, scottwood@...escale.com,
linuxppc-dev@...abs.org, alan@...rguk.ukuu.org.uk,
linux-kernel@...r.kernel.org
Subject: Re: MMIO and gcc re-ordering issue
On Thursday 12 June 2008 02:07, Jesse Barnes wrote:
> On Tuesday, June 10, 2008 8:29 pm Nick Piggin wrote:
> > You mention strong ordering WRT spin_unlock, which suggests that
> > you would prefer to take option #2 (the current powerpc one): io/io
> > is ordered and io is contained inside spinlocks, but io/cacheable
> > in general is not ordered.
>
> I was thinking it would be good for the weaker accessors, but now that I
> think about it you could just use the new io_* barrier functions.
>
> I didn't mean to imply that I wasn't in favor of the io/cacheable ordering
> as well.
>
> > For any high performance drivers that are well maintained (ie. the
> > ones where slowdown might be noticed), everyone should have a pretty
> > good handle on memory ordering requirements, so it shouldn't take
> > long to go through and convert them to relaxed accessors.
>
> Yep. Thanks for working on this, Nick, it's definitely a good thing that
> you're taking control of it. :)
Well, I really am just trying to help the kernel for everyone (and every
architecture). Performance for all architectures really is my #2 priority,
so if any arch becomes irrepearably slower under a proposal I would
go back to the drawing board.
I'll come up with a proposal in the form of an initial code+documentation
patch when I get some more time on it.
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