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Date:	Fri, 13 Jun 2008 09:24:24 +0200
From:	Ingo Molnar <mingo@...e.hu>
To:	Jeremy Fitzhardinge <jeremy@...p.org>
Cc:	Jan Beulich <jbeulich@...ell.com>,
	Stable Kernel <stable@...nel.org>, x86@...nel.org,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH UPDATED] x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.


* Jeremy Fitzhardinge <jeremy@...p.org> wrote:

> Ingo Molnar wrote:
>>> When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can  
>>> potentially have the same number of physical address bits as the  
>>> 64-bit host ("Enhanced Legacy PAE Paging").  This means, in theory, 
>>> we could have up to 52 bits of physical address in a pte.
>>>
>>> The 32-bit kernel uses a 32-bit unsigned long to represent a pfn. 
>>> This means that it can only represent physical addresses up to 
>>> 32+12=44 bits wide.  Rather than widening pfns everywhere, just set 
>>> 2^44 as the Linux x86_32-PAE architectural limit for physical address 
>>> size.
>>>     
>>
>> applied to tip/x86/cleanups - thanks Jeremy. No urgency for v2.6.26, 
>> right?
>
> Not urgent, but it would be nice to have.

ok, cherry-picked it into x86/urgent. This aspect makes it eligible for 
v2.6.26:

| This is a bugfix for two cases:
| 1. running a 32-bit PAE kernel on a machine with
|   more than 64GB RAM.
| 2. running a 32-bit PAE Xen guest on a host machine with
|   more than 64GB RAM
|
| In both cases, a pte could need to have more than 36 bits of physical,
| and masking it to 36-bits will cause fairly severe havoc.

also added a stable@...nel.org Cc: to the commit, so it will be picked 
up in stable as well.

	Ingo
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